refactor: Some AArch64 specific NEON intrinsics was wrapped into macros. #37
Conversation
lordnn
changed the title
lordnn
changed the title
lordnn
changed the title
kpchoi
left a comment
kpchoi
left a comment
There was a problem hiding this comment.
checking the following comment is required.
| { // Row 0 | ||
| int32x4_t sad_vector = vdupq_n_s32(0); | ||
| // Loop unrolling | ||
| #pragma GCC unroll 8 |
There was a problem hiding this comment.
Can this work on non-GCC compiler?
There was a problem hiding this comment.
This works also on CLang and does nothing on MSVC, because of unknown pragma is not an error.
P.S. It may produce warning on MSVC, in dependency on warning level.
There was a problem hiding this comment.
It means that the unrolling will not work properly on MSVC, and it can lead slow operation.
There was a problem hiding this comment.
It's hard to tell without measurement. Measure before Optimizing.
- Small cycle will not flush instruction cache, so it may works faster without unrolling.
- MSVC may unroll it without pragmas. Trust to compiler.
- Do you really use MSVC to compile ARM project?
lordnn
changed the title
|
Now it can be compiled for ARMv7 target, I hope. |
|
The PR 1) proposes using several Macros, and 2) fixes minor typos, to refactor the ARM implementation. Please provide the following details: |
|
с) Currently muster brunch produce warnings during MSVC 2022 build. So, please clean it's first. And what's the "all platforms" you mention about? Please provide details. |
3 participants
…code.